Conventional analog to digital (A to D) converter circuits are well known to those skilled in logic circuit design. Such conventional A to D circuits typically comprise an analog input comparator coupled to an up/down counter driven by a high speed tracking clock. A digital output from the counter, representing the count value contained in the up/down counter, is coupled to a digital to analog (D to A) converter for translation of the digital count value to an analog voltage level. The analog output of the D to A converter is typically coupled back to the analog input comparator for comparison with an analog input signal.
In typical operation, when the input comparator has an input voltage present at its input, if the input voltage is higher than the analog output voltage being sent to the input comparator by the D to A converter, then the output of the comparator causes the tracking clock to increment the up/down counter so as to increase its count value. The increasing count value results in an increasing analog output voltage level from the D to A converter. When the output of the D to A converter has reached a level equal to that of the input voltage, the input comparator stops the up/down counter.
Conversely, if the input voltage level falls below that being sent to the input comparator by the D to A converter, then the output of the comparator causes the tracking clock to decrement the up/down counter so as to decrease its count value. The decreasing count value results in a decreasing analog output voltage level from the D to A converter. When the output of the D to A converter again has reached a level equal to that of the input voltage, the input comparator stops the up/down counter. Whenever the circuit has reached equilibrium, and the comparator has substantially stopped incrementing or decrementing the counter, the digital output of the counter represents a value corresponding to the analog value of the input voltage. It is the digital output of the counter, therefore, that is used as the digital output of the conventional A to D converter just described.
In order to respond rapidly to changes in the input voltage level, the tracking clock frequency must be chosen such that the up/down counter will reach the equilibrium value as quickly as necessary to track the fastest transition of the input voltage. This requirement implies that the tracking clock frequency must be several times the highest frequency of interest in making the A to D conversion of the input voltage. Because it is often necessary to monitor very fast transitions of the input voltage level, a high frequency tracking clock also is often necessary, as is a high speed up/down counter that can operate at the high frequency of the tracking clock.
A disadvantage of the conventional A to D converter circuit is that the high frequency tracking clock and high speed counter can produce both conducted and radiated electromagnetic noise that can interfere with other circuitry within the system in which the A to D converter is used. In many cases, additional components or costly redesign passes may be required to prevent this noise from disturbing sensitive circuits. A further disadvantage is that the high speed counter can require significant power to operate. This is particularly disadvantageous when the A to D converter is used in a battery powered application such as a portable selective call receiver.